Hi,
My block has 512b wide registers. When I create the uvm_reg_model for the block I have to define “+UVM_REG_DATA_WIDTH=512”.
Now when the block gets reused in full chip simulation, there are other blocks have width of 32b.
Hence the full chip has to redefine this value to the greatest width again.
This looks wasteful for memory. (beside being clumsy). Is there any workaround. Not obvious to me why it does not use templates to fix the width of uvm_reg_field ?
-sanjeev
In reply to sanjeevs:
Using templates would be more efficient (in theory), but this usually brings along other problems. For example, the callbacks on registers are intended to work with the uvm_reg_field and uvm_reg classes. If these were parameterized, then we’d need to propagate the parameters to the callback classes that use them. The same applies to other classes that collaborate with them (predictor, map, etc.).
In reply to Tudor Timi:
Thanks,
I am unable to get the uvm_reg to generate the correct address for accessing my uvm_mem “MEM_winhashmem”. Details below.
Here is my code.
- I have defined ‘+define+UVM_REG_DATA_WIDTH=512’ since some register X is 512b wide.
- I have a memory “MEM_winhashmem” that is 16K * 512b starting at offset 0x80000 I use a vreg to access it.
My Model
=========
rand my_uvm_mem MEM_winhashmem;
rand my_uvm_vreg winhashmem;
virtual function void build();
this.MEM_winhashmem = new(“MEM_winhashmem”, 16384, 64);
this.MEM_winhashmem.configure(this);
this.winhashmem = new;
this.winhashmem.configure(this, MEM_winhashmem, 16384);
this.winhashmem.build();
this.default_map.add_mem(this.MEM_winhashmem, `UVM_REG_ADDR_WIDTH’h80000);
My Sequence
task body();
regmodel.winhashmem.write(0, status,512’hF000DCAFE); // Generates address 0x80000
regmodel.winhashmem.write(16383, status, 512’hAA55BBCC); // Generated address 0x17ffc0
endtask
Problem
since the memory is only 64b wide, I expected the address of index 16383 = 0x80000 + 0x1fff8 = 0x9FF8
However I am getting 0x80000 + 0x40 *16383 = 0x17FFC0. This is not correct.
-sanjeev
In reply to sanjeevs:
The workaround that seems to work is create a new map for the memory. Specify the size of the map to the size of the memory. So in example above.
function void build_phase();
this.default_map = create_map(“”, 0, 8, UVM_LITTLE_ENDIAN, 1);
…
this.default_map.add_mem(this.MEM0, `UVM_REG_ADDR_WIDTH’0);
end