So for a simple example, I have a DUT like that:
(simple counter, but data can be only read when read pin changed value from 0 to 1)
module DUT(
input logic clk,
input logic rst,
input logic read,
output logic [7:0] data_out
);
logic [7:0] data_internal;
always @(posedge clk, posedge rst) begin
if(rst)
data_internal <= 0;
else
data_internal <= data_internal+1;
end
logic read_last;
always @(posedge clk, posedge rst) begin
if(rst) begin
read_last <= 0;
data_out <= 0;
end
else begin
read_last <= read;
if( read & !read_last )
data_out <= data_internal;
end
end
endmodule
Here I cannot wait for the event from the DUT, because to read output data I have to firstly set the read pin. So I wonder how to wait for a specified time (e.g number of cycles specified by test), and also pass that information to the monitor, so I could predict the value in the reference model.
Then I would read data and compare output from DUT and reference model.