Hi there,
What is the best way to generate asynchronous reset in the UVM environment? I’m a little bit lost with so many possible solutions like the Cypress DVCon 2012 article using events, Cadence Reset Methodology and the reset_phase used in UVM 1.1d examples (I know that is not recommended by Mentor).
So, what kind of technique do you use in your environment?
Moreover, Dave Rich posted this a couple years ago and I really don’t understand how to do that:
For example, if you want to apply the reset signal for a random period, that should be randomized as part of a reset transaction that is sent to a driver that manages the reset pin of the DUT.
For now, I am generating a rand int unsigned delay and using this in driver. Like this:
class driver extends uvm_driver#(reset_trans);
...
task run_phase (uvm_phase phase);
...
forever begin
...
#(trans.delay * 1ns)
vif.reset_signal <= 0;
end
endtask
endclass