AHB Lite protocol Verification

UVM
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Hi,

I am trying understand the verification process of AHB lite protocol. I am trying build my resume to add a project to build a Full UVM testbench. I know the concept of AHB lite protocol I have gone through the whole spec twice.

But i want to understand the process of verifying it, so lets say when someone says verification of AHB lite protocol what should it have,

is it just read and write transactions between a single master and one or more slave?
or will there be any inclusions of BFM or should i verify a protocol in such a way that it acts as a bridge between two components and AHB lite protocol will act as a bus for communication between Component A and Component B.

Can someone please guide me bottom line i want to build a Full uvm testbench to verify AHB lite protocol. I want to know what to and how to do , what are all the components should i include in to verify it if necessary.

Thanks,
Teja

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AHB - Lite is a single Master and Multi Slave protocol. To verify this protocol, follow below steps.

  1. Design a simple DUT which does memory read and write using AHB - Lite interface. Which means reads and writes to memory should obey AHB - Lite protocol.
  2. Write UVM TB which contains all necessary components required like tb_top, test, env,master_agent(drives the data on AHB - Lite interface) ref model, Scoreboard etc.
  3. Code the master agent which should support all burst features like INCRs, WRAPs.
  4. Write the assertions to check the timing relationship of the AHB - Lite protocol signals
  5. Write functional coverage model so as to check you have exercised all possible input combinations or not.

Hope this helps.

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