Reset Modeling in UVM

UVM
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1

Hi,
what is the best way to model reset sequencing in UVM? There are series of handshakes that happen as part of reset. One way i can think of is break this into smaller sequence items and constraint it and drive it to the driver push it to the interface and then do the next step but the problem is how do i sample this in monitor since this is now spread come across different transactions. I am not sure if this is the cleanest way to do it. Is there any examples of modelling or any reference papers/guidelines to model this?

for any protocol we will have

1) Drive wake from sequence
2) wait for ack from DUT
3) Drive req from sequence
4) wait for ack from DUT

and so on…

Appreciate your inputs.

2

https://verificationacademy.com/verification-horizons/june-2012-volume-8-issue-2/On-the-Fly-Reset

https://verificationacademy.com/verification-horizons/november-2014-volume-10-issue-3/Controlling-On-the-Fly-Resets-in-a-UVM-Based-AXI-Testbench

3

In reply to dave_59:

Hi Dave,

All these point to how the testbench can handle reset in the middle of the test. My question was more of how we do the initial reset bring up sequencing.