whitebox_verification-systemverilog
Topic | Replies | Views | Activity | |
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Observe/Read the value of an internal signal of a submodule in my design |
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3 | 610 | May 25, 2023 |
Topic | Replies | Views | Activity | |
---|---|---|---|---|
Observe/Read the value of an internal signal of a submodule in my design |
![]() ![]() |
3 | 610 | May 25, 2023 |