Topics tagged SDF

Topic	Replies	Views	Activity
Post implementation timing simulation error SystemVerilog SystemVerilog , SDF , backannotation	1	138	September 3, 2023
Can SDF file cause incorrect driving of wires/ports? SystemVerilog SystemVerilog , SDF , bidirectional-ports	0	925	April 30, 2017
Why are There 2 SDFs Files? SystemVerilog SystemVerilog , SDF , max-delay , min-delay , typical-is-missing	1	1135	April 18, 2017