Write an assertion for checking whether global clock is working properly with out taking a relative clock

SystemVerilog
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3

In reply to ben@SystemVerilog.us:

Thanks for the reply Ben.
I understood your approach.
But my intention is to use SVA to solve this problem.

I will clarify the scenario for you.

I have a clock (Lets call it global clock and take a time period of 10ns).
I want to write an assertion such that it will check clock is maintaining that 10ns time period