Why $urandom not generate a random series

I want to generate a rand series which diff with diff seed ;


  task automatic test_rand();

    for(int i=0;i<32;i++) begin
      $display("rand test1 : %h",$urandom &8'hff);
      $display("rand test2 : %h",$urandom(98));
      $display("rand test 10: %h",{$random()}%10);
      $display("urand test : %h",$urandom_range(32));
    end
  endtask


test1 always be ‘df’ except the first one
and test always be ‘d’

result:

rand test1 : 000000d2

rand test2 : cfccd4ba

rand test 10: 00000001

urand test : 0000000d

rand test1 : 000000df

rand test2 : cfccd4ba

rand test 10: 00000000

urand test : 0000000d

rand test1 : 000000df

rand test2 : cfccd4ba

rand test 10: 00000005

urand test : 0000000d

rand test1 : 000000df

rand test2 : cfccd4ba

rand test 10: 00000007

urand test : 0000000d

rand test1 : 000000df

rand test2 : cfccd4ba

rand test 10: 00000004

urand test : 0000000d

rand test1 : 000000df

rand test2 : cfccd4ba

rand test 10: 00000000

urand test : 0000000d

The argument to $urandom is the seed value. This argument is optional, but when you set it to a fixed value, such as 98, you force the simulator to return the same random number from $urandom.

Instead of $urandom(98), just omit the 98:

$display("rand test2 : %h",$urandom());

In reply to gsulliva:


$display("rand test2 : %h",$urandom());

get the same rand series when I run the case next time;

I want to get a new rand series different each time when run the case, how to deal with it

In reply to designer007:

SystemVerilog has a default initial random seed that can be set from the tool command line. (Questa has -sv_seed random). This applies to $urandom but not $random. See section 18.14 Random stability in the IEEE 1800-2017 SystemVerilog LRM

-sv_seed random used as
vsim -sv_seed random
or
vsim -sv_seed a_specific_number
?

In reply to dave_59:

In reply to designer007:
SystemVerilog has a default initial random seed that can be set from the tool command line. (Questa has -sv_seed random). This applies to $urandom but not $random. See section 18.14 Random stability in the IEEE 1800-2017 SystemVerilog LRM

In reply to designer007:

You typically use a random seed each time you run a testcase. To debug a testcase failure, you use a specific number to repeat the same series of random numbers generated for that seed.

In reply to dave_59:

In reply to designer007:
You typically use a random seed each time you run a testcase. To debug a testcase failure, you use a specific number to repeat the same series of random numbers generated for that seed.

I try vsim -sv_seed random 2 times;


  task automatic test_rand();

    for(int i=0;i<32;i++) begin
      $display("rand test1 : %h seed: %h",$urandom, $get_initial_random_seed );
      $display("rand test2 : %h",$urandom(98));
      $display("rand test 10: %h",{$random()}%10);
      $display("urand test : %h",$urandom_range(32));
    end
  endtask

but rand test1 result is same , with diff seed

1st rst:

rand test1 : 99b8d01f seed: dbb145f2

rand test2 : cfccd4ba

rand test 10: 00000001

urand test : 0000000d

rand test1 : 7072cfdf seed: dbb145f2

rand test2 : cfccd4ba

rand test 10: 00000000

urand test : 0000000d

rand test1 : 7072cfdf seed: dbb145f2

rand test2 : cfccd4ba

rand test 10: 00000005

urand test : 0000000d

rand test1 : 7072cfdf seed: dbb145f2

rand test2 : cfccd4ba

rand test 10: 00000007

urand test : 0000000d

rand test1 : 7072cfdf seed: dbb145f2

rand test2 : cfccd4ba

rand test 10: 00000004

urand test : 0000000d

rand test1 : 7072cfdf seed: dbb145f2

rand test2 : cfccd4ba

rand test 10: 00000000

2nd rst:

rand test1 : 99b8d01f seed: 34b15e47

rand test2 : cfccd4ba

rand test 10: 00000001

urand test : 0000000d

rand test1 : 7072cfdf seed: 34b15e47

rand test2 : cfccd4ba

rand test 10: 00000000

urand test : 0000000d

rand test1 : 7072cfdf seed: 34b15e47

rand test2 : cfccd4ba

rand test 10: 00000005

urand test : 0000000d

rand test1 : 7072cfdf seed: 34b15e47

rand test2 : cfccd4ba

rand test 10: 00000007

urand test : 0000000d

rand test1 : 7072cfdf seed: 34b15e47

rand test2 : cfccd4ba

rand test 10: 00000004

urand test : 0000000d

In reply to designer007:

I’m not seeing that. Here is a complete example

module top;
  task automatic test_rand();
 
    for(int i=0;i<2;i++) begin
      $display("rand test1 : %h seed: %h",$urandom, $get_initial_random_seed );
      $display("rand test2 : %h",$urandom(98));
      $display("rand test 10: %h",{$random()}%10);
      $display("urand test : %h",$urandom_range(32));
    end
  endtask
  initial test_rand;
endmodule

1st run

# rand test1 : 098cdb2e seed: 0f32c20e
# rand test2 : a208270a
# rand test 10: 00000008
# urand test : 0000000f
# rand test1 : f0982ece seed: 0f32c20e
# rand test2 : a208270a
# rand test 10: 00000007
# urand test : 0000000f

2nd run

# rand test1 : 4442eba1 seed: 09f2d430
# rand test2 : a208270a
# rand test 10: 00000008
# urand test : 0000000f
# rand test1 : f0982ece seed: 09f2d430
# rand test2 : a208270a
# rand test 10: 00000007
# urand test : 0000000f

In reply to dave_59:

yes , it’s correct ;

something tricky happened in my env ;
I find a way to work around