Verification Academy
Why does the RAL read() update the mirrored AND desired register model values?
UVM
Ral-write-and-read-methhods
,
UVM
,
uvm-ral
dave_59
June 21, 2020, 9:30pm
2
In reply to
BrianK
:
It depnds on the register access policy. See
this link
.
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