In reply to dave_59:
module A_top;
parameter ADDR_WIDTH = 10;
B B_inst;
endmodule
module B;
parameter ADDR_WIDTH = 5;
endmodule
my question is that ADDR_WIDTH is defined twice, and what value is it finally?
In reply to dave_59:
module A_top;
parameter ADDR_WIDTH = 10;
B B_inst;
endmodule
module B;
parameter ADDR_WIDTH = 5;
endmodule
my question is that ADDR_WIDTH is defined twice, and what value is it finally?