In reply to ben@SystemVerilog.us:
Then what is the meaning of this sequnce ?
sequence nackSeq;
##1 1 [*1:$] ##0 $rose(scl) ##0 (iicByteCnt==0&&iicBitCnt==8&&sda&&scl) [*1:$] ##1 !scl;
endsequence
If there is any rule to write this type of sequences then please refer it to me.