Wb_mac_config_vif_pm code example gives me # ** Fatal: (SIGSEGV) Bad handle or reference

UVM
,
1

I tried running one of the working uvm test cases to help me understand virtual interfaces (wb_mac_config_vif_pm), but ran into problems.
After adding a couple of missing variable definitions to get past compile errors:
virtual class wb_mem_map_access_base_seq extends uvm_sequence;
snip…
int unsigned m_mac_wb_base_addr; // added by RLHS
int unsigned m_tb_addr; // added by RLHS

I got the error below, which looks like get_register_map failed, I’m not sure how to repair this code, called from class method ‘new’.
–Ross

UVM_WARNING @ 0: reporter [TPRGED] Type name ‘wb_mem_map_access_base_seq’ already registered with factory. No string-based lookup support for multiple types with the same type name.

UVM_INFO verilog_src/questa_uvm_pkg-1.2/src/questa_uvm_pkg.sv(215) @ 0: reporter [Questa UVM] QUESTA_UVM-1.2.2

UVM_INFO verilog_src/questa_uvm_pkg-1.2/src/questa_uvm_pkg.sv(217) @ 0: reporter [Questa UVM] questa_uvm::init(+struct)

UVM_INFO @ 0: reporter [RNTST] Running test test_mac_simple_duplex…

UVM_INFO ./wishbone/wb_mac_reg_scoreboard.svh(76) @ 195: uvm_test_top.env.mac_regs [REG_MON]

---- Did a shadow reg write to register_map.mac_0_regs.mode_reg

UVM_INFO ./wishbone/wb_mac_reg_scoreboard.svh(76) @ 273: uvm_test_top.env.mac_regs [REG_MON]

---- Did a shadow reg write to register_map.mac_0_regs.mac_addr0_reg

UVM_INFO ./wishbone/wb_mac_reg_scoreboard.svh(76) @ 351: uvm_test_top.env.mac_regs [REG_MON]

---- Did a shadow reg write to register_map.mac_0_regs.mac_addr1_reg

UVM_INFO ./wishbone/wb_mac_reg_scoreboard.svh(76) @ 429: uvm_test_top.env.mac_regs [REG_MON]

---- Did a shadow reg write to register_map.mac_0_regs.int_mask_reg

** Fatal: (SIGSEGV) Bad handle or reference.

Time: 429 ns Iteration: 12 Process: /sequences_pkg::mac_simple_duplex_seq::body/#FORK#70_55a0138 File: ./mac_mii/mac_mii_base_frame_seq.svh

Fatal error in Function uvm_pkg/uvm_component::get_config_object at /mrvl2g/caev15/eda10/MENTOR/QUESTASIM/10.3f/questasim/linux/…/verilog_src/uvm-1.1d/src/base/uvm_component.svh line 2941

HDL call sequence:

Stopped at ./mac_mii/mac_mii_base_frame_seq.svh 110 Function uvm_pkg/uvm_component::get_config_object

called from ./mac_mii/mac_mii_base_frame_seq.svh 49 Function mac_mii_pkg/wb_mem_map_access_base_seq::new

called from ./mac_mii/mac_tx_frame_seq.svh 42 Function mac_mii_pkg/mac_tx_frame_seq::new

called from /mrvl2g/caev15/eda10/MENTOR/QUESTASIM/10.3f/questasim/linux/…/verilog_src/uvm-1.1d/src/base/uvm_registry.svh 199 Function uvm_pkg/uvm_object_registry::create_object

called from /mrvl2g/caev15/eda10/MENTOR/QUESTASIM/10.3f/questasim/linux/…/verilog_src/uvm-1.1d/src/base/uvm_factory.svh 1104 Function uvm_pkg/uvm_factory::create_object_by_type

called from /mrvl2g/caev15/eda10/MENTOR/QUESTASIM/10.3f/questasim/linux/…/verilog_src/uvm-1.1d/src/base/uvm_registry.svh 248 Function uvm_pkg/uvm_object_registry::create

called from ./sequences/mac_simple_duplex_seq.svh 191 Task sequences_pkg/mac_simple_duplex_seq::mac_tx_frame

called from ./sequences/mac_simple_duplex_seq.svh 70 Task sequences_pkg/mac_simple_duplex_seq::body

2

In reply to rossswanson:

Hi Ross, could you elaborate a little bit more about your problem. Is it one of the UVM cookbook examples and which one?
What worries me is this line of code:
virtual class wb_mem_map_access_base_seq extends uvm_sequence;
What is your intention for this?

Christoph

3

In reply to chr_sue:

Hi,
The example down load name is in the original post see name between ();
This is supposedly a working exampole under the vif page, but it had compile problems right off the bat.

What worries me is this line of code:
I copied the line of code that contains the failing problem.

4

In reply to rossswanson:

To fix the issue, edit the file mac_mii/mac_mii_pkg.sv and comment out line 37:


 `include "uvm_macros.svh"
 `include "ethernet_txn.svh"
 `include "ethernet_txn_ext.svh"
 `include "mii_config.svh"
 `include "mii_tx_driver.svh"
 `include "mii_rx_driver.svh"
// `include "mac_mii_base_frame_seq.svh"  <-- Line 37
 `include "mac_rx_frame_seq.svh"
 `include "mac_tx_frame_seq.svh"
 `include "mac_mii_tx_agent.svh"
 `include "mac_mii_rx_agent.svh"
 `include "mac_mii_duplex_agent.svh"
 `include "mii_scoreboard.svh"
5

In reply to cgales:

Hi
I commented out the line and ran vlog on the files within vsim -c
but got exact same error.

I then tried make clean followed by make cmp but got a bunch of errors that go off the screen, I can not find the first error, not enough lines in my xterm. I do not see a log file when I run the make file. This is why I run from vsim -c I suppose I could try tee on the make.

One of the errors from running the make is:
** Error: ./sequences/sequences_pkg.sv(28): (vlog-13006) Could not find the package (mac_mii_pkg). Design read will continue, but expect a cascade of errors after this failure. Furthermore if you experience a vopt-7 error immediately before this error then please check the package names or the library search paths on the command line.
** Error: ** while parsing file included at ./sequences/sequences_pkg.sv(33)
snip…

// “global” virtual interface
virtual mii_if v_miim_if;

include "uvm_macros.svh" include “ethernet_txn.svh”
include "ethernet_txn_ext.svh" include “mii_config.svh”
include "mii_tx_driver.svh" include “mii_rx_driver.svh”
//RLHS from cgales include "mac_mii_base_frame_seq.svh" include “mac_rx_frame_seq.svh”
`include “mac_tx_frame_seq.svh”

–Ross

6

In reply to rossswanson:

I did a tee and see the first error when running from make

– Importing package mac_info_pkg
– Importing package wishbone_pkg
** Error: ** while parsing file included at ./mac_mii/mac_mii_pkg.sv(39)
** at ./mac_mii/mac_tx_frame_seq.svh(137): near “;”: syntax error, unexpected ‘;’, expecting ‘(’
** Error: ** while parsing file included at ./mac_mii/mac_mii_pkg.sv(39)
** at ./mac_mii/mac_tx_frame_seq.svh(160): (vlog-2730) Undefined variable: ‘error’.
** Error: ** while parsing file included at ./mac_mii/mac_mii_pkg.sv(39)
** at ./mac_mii/mac_tx_frame_seq.svh(161): (vlog-2730) Undefined variable: ‘retry_count’.
** Error: ** while parsing file included at ./mac_mii/mac_mii_pkg.sv(39)
** at ./mac_mii/mac_tx_frame_seq.svh(168): (vlog-2730) Undefined variable: ‘tx_irq’.

7

My guess is that you made other changes as well. Start with the original download and make the one change I specified. With that change, everything works fine for me.

8

In reply to cgales:

I only added
./mac_mii/mac_mii_base_frame_seq.svh: int unsigned m_mac_wb_base_addr; // added by RLHS
./mac_mii/mac_mii_base_frame_seq.svh: int unsigned m_tb_addr; // added by RLHS

I’ll download again…

9

In reply to rossswanson:

Downloaded again edited pkg to comment out line 37 base frame seq and got error below from make:

Loading work.mii_if(fast)

** Fatal: (vsim-8451) ./wishbone/wb_bus_bfm_monitor.svh(56): Virtual interface resolution cannot find a matching instance for ‘virtual wishbone_bus_bfm_if’.

Global interface ‘wishbone_bus_bfm_if’ expected.

Non-matching nested interface from ‘wb_bus_wrapper’ has instances:

./wishbone/wb_bus_wrapper.sv(157): wishbone_bus_bfm_if #() wb_bus_bfm_if()

Global interface ‘wishbone_bus_bfm_if’ expected.

Non-matching nested interface from ‘wb_bus_wrapper’ has instances:

./wishbone/wb_bus_wrapper.sv(157): wishbone_bus_bfm_if #() wb_bus_bfm_if()

Time: 0 ns Iteration: 0 Region: /wishbone_pkg File: ./wishbone/wb_mac_reg_scoreboard.svh

FATAL ERROR while loading design

Error loading design

Error loading design

End time: 13:46:22 on Mar 30,2016, Elapsed time: 0:00:03

Errors: 1, Warnings: 0

SUNGRID >> ERROR : Job Exited.
Exit code is: 12
make: *** [sim] Error 12

10

In reply to rossswanson:

Hi Ross, did you delete the old compiled library?
After making the change cgales was advicing, it works in my environment.

11

In reply to chr_sue:

Hi
I put the tar extract into a new dir so the work dir is new.
I thought it might be version dependent I was running 10.3f, I changed to 10.5 and got same error.
Maybe I need to specify 64 bit…
didn’t make a difference.

12

In reply to rossswanson:

Hi Ross,

it looks like something is wrong with your setup. Could you please check if the environment variable UVM_HOME is set?
Additionally you could try to download any other example and try to run it.

13

In reply to chr_sue:

Hi,
The make file sets this up
UVM_HOME ?= /proj/eda/MENTOR/QUESTASIM/10.4d/questasim/verilog_src/uvm-1.1d
UVM_SRC = $(UVM_HOME)/src

ls -al $UVM_SRC
-r–rwxr-- 1 i eda 1304 Dec 29 21:27 uvm_pkg.sv*
-r–rwxr-- 1 i eda 2121 Dec 29 21:27 uvm_macros.svh*
-r–rwxr-- 1 i eda 944 Dec 29 21:27 uvm.sv*
drwxrwxr-x 2 i eda 4096 Jan 18 16:50 base/
drwxrwxr-x 2 i eda 4096 Jan 18 16:50 comps/
drwxrwxr-x 2 i eda 4096 Jan 18 16:50 deprecated/
drwxrwxr-x 2 i eda 4096 Jan 18 16:50 dpi/
drwxrwxr-x 2 i eda 4096 Jan 18 16:50 macros/
drwxrwxr-x 3 i eda 4096 Jan 18 16:50 reg/
drwxrwxr-x 2 i eda 4096 Jan 18 16:50 seq/
drwxrwxr-x 2 i eda 4096 Jan 18 16:50 tlm1/
drwxrwxr-x 2 i eda 4096 Jan 18 16:50 tlm2/

14

In reply to rossswanson:

Hi Ross, the UVM source code looks pretty good.
But I had a deeper look to the code.
The error message you have posted above:

** Fatal: (vsim-8451) ./wishbone/wb_bus_bfm_monitor.svh(56): Virtual interface resolution cannot find a matching instance for ‘virtual wishbone_bus_bfm_if’.

Can not be from the example ‘wb_mac_config_vif_pm’. There is no file named ./wishbone/wb_bus_bfm_monitor.svh

Could you please check again.

15

In reply to chr_sue:

Hi
Yes sorry about the confusion. There are two gz downloads on that vif page and I was trying the other one.

Below is what I get after executing make:
QuestaSim vlog 10.5 Compiler 2016.02 Feb 12 2016
Start time: 14:05:34 on Mar 31,2016
vlog -suppress 2223 -suppress 2181 ./wishbone/wb_slave_mem.sv ./wishbone/wishbone_bus_syscon_if.sv ./top_modules/test_params_pkg.sv ./mac_mii/mii_if.sv ./mac_mii/mac_mii_protocol_module.sv ./eth/wb_register_pkg.sv ./eth/mac_info_pkg.sv ./wishbone/wishbone_pkg.sv ./mac_mii/mac_mii_pkg.sv ./sequences/sequences_pkg.sv ./env/env_pkg.sv ./tests/tests_pkg.sv ./top_modules/top_mac.sv “+incdir+./wishbone” “+incdir+./eth” “+incdir+./sequences” “+incdir+./mac_mii” “+incdir+./tests” “+incdir+./env” “+incdir+./uvm/src/uvm_register-2.0/src” “+incdir+/proj/eda/MENTOR/QUESTASIM/10.4d/questasim/verilog_src/uvm-1.1d/src”
– Compiling module wb_slave_mem
– Importing package mtiUvm.uvm_pkg (uvm-1.1d Built-in)
– Compiling package wishbone_bus_syscon_if_sv_unit
– Importing package mtiUvm.uvm_pkg (uvm-1.1d Built-in)
– Compiling interface wishbone_bus_syscon_if
– Compiling package test_params_pkg
– Compiling interface mii_if
– Compiling module mac_mii_protocol_module
– Compiling package wb_register_pkg
– Importing package uvm_register_pkg
– Compiling package mac_info_pkg
– Compiling package wishbone_pkg
– Importing package wb_register_pkg
– Compiling package mac_mii_pkg
– Importing package mac_info_pkg
– Importing package wishbone_pkg
** Error: (vlog-13069) ** while parsing file included at ./mac_mii/mac_mii_pkg.sv(39)
** at ./mac_mii/mac_tx_frame_seq.svh(137): near “;”: syntax error, unexpected ‘;’, expecting ‘(’.
** Error: ** while parsing file included at ./mac_mii/mac_mii_pkg.sv(39)
** at ./mac_mii/mac_tx_frame_seq.svh(144): Illegal declaration after the statement near line ‘137’. Declarations must precede statements. Look for stray semicolons.
– Compiling package sequences_pkg
** Error: ./sequences/sequences_pkg.sv(25): (vlog-13006) Could not find the package (mac_mii_pkg). Design read will continue, but expect a cascade of errors after this failure. Furthermore if you experience a vopt-7 error immediately before this error then please check the package names or the library search paths on the command line.
** Error: ./sequences/sequences_pkg.sv(27): (vlog-13006) Could not find the package (mac_mii_pkg). Design read will continue, but expect a cascade of errors after this failure. Furthermore if you experience a vopt-7 error immediately before this error then please check the package names or the library search paths on the command line.
** Error: ./sequences/sequences_pkg.sv(28): (vlog-13006) Could not find the package (mac_mii_pkg). Design read will continue, but expect a cascade of errors after this failure. Furthermore if you experience a vopt-7 error immediately before this error then please check the package names or the library search paths on the command line.
** Error: ** while parsing file included at ./sequences/sequences_pkg.sv(33)
** at ./sequences/mac_simple_duplex_seq.svh(34): (vlog-2730) Undefined variable: ‘ethernet_txn’.
** Error: ** while parsing file included at ./sequences/sequences_pkg.sv(33)
** at ./sequences/mac_simple_duplex_seq.svh(44): Invalid type ‘ethernet_txn’. Please check the type of the variable ‘eth_rsp_txn’.
** Error: (vlog-13069) ** while parsing file included at ./sequences/sequences_pkg.sv(33)
** at ./sequences/mac_simple_duplex_seq.svh(130): near “;”: syntax error, unexpected ‘;’, expecting ‘(’.
** Error: ** while parsing file included at ./sequences/sequences_pkg.sv(33)
** at ./sequences/mac_simple_duplex_seq.svh(132): Illegal declaration after the statement near line ‘130’. Declarations must precede statements. Look for stray semicolons.
** Error: (vlog-13069) ** while parsing file included at ./sequences/sequences_pkg.sv(33)
** at ./sequences/mac_simple_duplex_seq.svh(135): near “end”: syntax error, unexpected end.
snip…

16

In reply to rossswanson:

Hi Ross, no problem. Let’s go ahead to find the solution.
The error message in the compile shows us the type tx_bd_t is not defined.
But tx_bd_t is defined in ./eth/wb_register_pkg.sv.

I’m not sure if you were pasting the whole log of the compile into your message. My make log looks like this (cutting out the simulation part):

make
rm -rf *.tmp *.log log transcript work *.wlf vsim.fcdb .vstf
find . -name "~"
test -e work || vlib work
vlog +incdir+/opt/questa/current/questasim/verilog_src/uvm-1.1d/src +incdir+./uvm/src/uvm_register-2.0/src ./uvm/src/uvm_register-2.0/src/uvm_register_pkg.sv
QuestaSim-64 vlog 10.4c Compiler 2015.07 Jul 19 2015
Start time: 08:23:05 on Apr 01,2016
vlog “+incdir+/opt/questa/current/questasim/verilog_src/uvm-1.1d/src” “+incdir+./uvm/src/uvm_register-2.0/src” ./uvm/src/uvm_register-2.0/src/uvm_register_pkg.sv
– Compiling package uvm_register_pkg
– Importing package mtiUvm.uvm_pkg (uvm-1.1d Built-in)

Top level modules:
–none–
End time: 08:23:06 on Apr 01,2016, Elapsed time: 0:00:01
Errors: 0, Warnings: 0
test -e work || vlib work
vlog +incdir+./mac_core -y ./mac_core +libext+.v ./mac_core/eth_top.v
QuestaSim-64 vlog 10.4c Compiler 2015.07 Jul 19 2015
Start time: 08:23:06 on Apr 01,2016
vlog “+incdir+./mac_core” -y ./mac_core “+libext+.v” ./mac_core/eth_top.v
– Compiling module eth_top
– Scanning library directory ‘./mac_core’
– Compiling module eth_miim
– Compiling module eth_registers
– Compiling module eth_maccontrol
– Compiling module eth_txethmac
– Compiling module eth_rxethmac
– Compiling module eth_wishbone
– Compiling module eth_macstatus
– Compiling module eth_clockgen
– Compiling module eth_shiftreg
– Compiling module eth_outputcontrol
– Compiling module eth_register
– Compiling module eth_receivecontrol
– Compiling module eth_transmitcontrol
– Compiling module eth_txcounters
– Compiling module eth_txstatem
– Compiling module eth_crc
– Compiling module eth_random
– Compiling module eth_rxstatem
– Compiling module eth_rxcounters
– Compiling module eth_rxaddrcheck
– Compiling module eth_spram_256x32
– Compiling module eth_fifo

Top level modules:
eth_top
End time: 08:23:06 on Apr 01,2016, Elapsed time: 0:00:00
Errors: 0, Warnings: 0
vlog -suppress 2223 -suppress 2181 ./wishbone/wb_slave_mem.sv ./wishbone/wishbone_bus_syscon_if.sv ./top_modules/test_params_pkg.sv ./mac_mii/mii_if.sv ./mac_mii/mac_mii_protocol_module.sv ./eth/wb_register_pkg.sv ./eth/mac_info_pkg.sv ./wishbone/wishbone_pkg.sv ./mac_mii/mac_mii_pkg.sv ./sequences/sequences_pkg.sv ./env/env_pkg.sv ./tests/tests_pkg.sv ./top_modules/top_mac.sv
+incdir+./wishbone
+incdir+./eth
+incdir+
+incdir+
+incdir+./sequences
+incdir+./mac_mii
+incdir+./tests
+incdir+./env
+incdir+./uvm/src/uvm_register-2.0/src
+incdir+/opt/questa/current/questasim/verilog_src/uvm-1.1d/src
QuestaSim-64 vlog 10.4c Compiler 2015.07 Jul 19 2015
Start time: 08:23:06 on Apr 01,2016
vlog -suppress 2223 -suppress 2181 ./wishbone/wb_slave_mem.sv ./wishbone/wishbone_bus_syscon_if.sv ./top_modules/test_params_pkg.sv ./mac_mii/mii_if.sv ./mac_mii/mac_mii_protocol_module.sv ./eth/wb_register_pkg.sv ./eth/mac_info_pkg.sv ./wishbone/wishbone_pkg.sv ./mac_mii/mac_mii_pkg.sv ./sequences/sequences_pkg.sv ./env/env_pkg.sv ./tests/tests_pkg.sv ./top_modules/top_mac.sv “+incdir+./wishbone” “+incdir+./eth” “+incdir+” “+incdir+” “+incdir+./sequences” “+incdir+./mac_mii” “+incdir+./tests” “+incdir+./env” “+incdir+./uvm/src/uvm_register-2.0/src” “+incdir+/opt/questa/current/questasim/verilog_src/uvm-1.1d/src”
– Compiling module wb_slave_mem
– Importing package mtiUvm.uvm_pkg (uvm-1.1d Built-in)
– Compiling interface wishbone_bus_syscon_if
– Compiling package wishbone_bus_syscon_if_sv_unit
– Importing package mtiUvm.uvm_pkg (uvm-1.1d Built-in)
– Compiling interface wishbone_bus_syscon_if
– Compiling package test_params_pkg
– Compiling interface mii_if
– Compiling module mac_mii_protocol_module
– Compiling package wb_register_pkg
– Importing package uvm_register_pkg
– Compiling package mac_info_pkg
– Compiling package wishbone_pkg
– Importing package wb_register_pkg
– Compiling package mac_mii_pkg
– Importing package mac_info_pkg
– Importing package wishbone_pkg
– Compiling package sequences_pkg
– Importing package mac_mii_pkg
– Compiling package env_pkg
– Compiling package tests_pkg
– Importing package env_pkg
– Importing package sequences_pkg
– Importing package test_params_pkg
– Compiling module top_mac
– Importing package tests_pkg

Top level modules:
top_mac

Could you please check that all the stuff in folder eth was compiled.

17

In reply to chr_sue:

The vlog command with argument is the same.
The simulator output of the vlog differs, shown below mine is on the left
– Compiling module wb_slave_mem – Compiling module wb_slave_mem
– Importing package mtiUvm.uvm_pkg (uvm-1.1d Built-in) – Importing package mtiUvm.uvm_pkg (uvm-1.1d Built-in)
– Compiling package wishbone_bus_syscon_if_sv_unit – Compiling interface wishbone_bus_syscon_if
– Importing package mtiUvm.uvm_pkg (uvm-1.1d Built-in) – Compiling package wishbone_bus_syscon_if_sv_unit
– Compiling interface wishbone_bus_syscon_if – Importing package mtiUvm.uvm_pkg (uvm-1.1d Built-in)
– Compiling package test_params_pkg – Compiling interface wishbone_bus_syscon_if
– Compiling interface mii_if – Compiling package test_params_pkg
– Compiling module mac_mii_protocol_module – Compiling interface mii_if
– Compiling package wb_register_pkg – Compiling module mac_mii_protocol_module
– Importing package uvm_register_pkg – Compiling package wb_register_pkg
– Compiling package mac_info_pkg – Importing package uvm_register_pkg
– Compiling package wishbone_pkg – Compiling package mac_info_pkg
– Importing package wb_register_pkg – Compiling package wishbone_pkg
– Compiling package mac_mii_pkg – Importing package wb_register_pkg
– Importing package mac_info_pkg – Compiling package mac_mii_pkg
– Importing package wishbone_pkg – Importing package mac_info_pkg
** Error: (vlog-13069) ** while parsing file included at – Importing package wishbone_pkg

The first difference is this line
– Compiling package wishbone_bus_syscon_if_sv_unit – Compiling interface wishbone_bus_syscon_if

I’m surprised the compile sequence causes the Error. I could change the vlog command in the make so the compile sequence is the same? Let me know.
–Ross
PS Thanks for the help.

18

In reply to rossswanson:

I don’t believe the problem is the sequence of the compile steps.
The first error message you get is:
** at ./mac_mii/mac_tx_frame_seq.svh(137): near “;”: syntax error, unexpected ‘;’, expecting ‘(’.

Line 137 is:
tx_bd_t txbd;
The compiler complains about missing (. This is an indication that tx_bd_t is not existing/known.

I have extracted the vlog commands from the make execution.
See the commands below.

vlog “+incdir+/opt/questa/current/questasim/verilog_src/uvm-1.1d/src” “+incdir+./uvm/src/uvm_register-2.0/src” ./uvm/src/uvm_register-2.0/src/uvm_register_pkg.sv
vlog “+incdir+./mac_core” -y ./mac_core “+libext+.v” ./mac_core/eth_top.v
vlog -suppress 2223 -suppress 2181 ./wishbone/wb_slave_mem.sv ./wishbone/wishbone_bus_syscon_if.sv ./top_modules/test_params_pkg.sv ./mac_mii/mii_if.sv ./mac_mii/mac_mii_protocol_module.sv ./eth/wb_register_pkg.sv ./eth/mac_info_pkg.sv ./wishbone/wishbone_pkg.sv ./mac_mii/mac_mii_pkg.sv ./sequences/sequences_pkg.sv ./env/env_pkg.sv ./tests/tests_pkg.sv ./top_modules/top_mac.sv
+incdir+./wishbone
+incdir+./eth
+incdir+
+incdir+
+incdir+./sequences
+incdir+./mac_mii
+incdir+./tests
+incdir+./env
+incdir+./uvm/src/uvm_register-2.0/src
+incdir+/opt/questa/current/questasim/verilog_src/uvm-1.1d/src

vsim +nowarnTSCALE -voptargs=“+acc” top_mac -suppress 3829
run -a

I’d like to ask you copy the commands in a file, may be named compile.do.
Adopt the paths which start with /opt/questa/current to your environment.
Then run from the command line

vsim -do compile.do &

Let me know if it works now.