Vertical re-use (from block to sub-system/chip level)

UVM
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1

I am in the process of evaluating an environment that is available at the IP level, at the sub-system level.
My specific interest is to re-use the stimulus or sequences from the IP level as these have proven to be very valuable at the IP level and also time consuming that we don’t want to repeat at the sub-system level.
My interest is not to re-use driver or monitor as the DUT interface has changed. In fact, it is not possible to re-use these components as the DUT interface has changed at the sub-system level.

Below is the image I have uploaded. The figure should give a better clarity on my problem statement.

I would like to get inputs from forum members as to what is the best way to approach this problem.
My initial approach is to use some converter layer to convert the sequence items from IP layer to sequence items for the new agent/interface, but I am not sure about the pitfalls in this approach.

2

In reply to verif_learner:

If I understand you right the only Change is the interface. It changes from a native interface to the standard AXI bus. If this i right you have to change only the run_phase of all transactors (driver, monitor). The seq_item should be the same, because this is Independent from the pin-level interface you are using. In this case you Can reuse all your esquences/tests etc.

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In reply to chr_sue:

In reply to verif_learner:
If I understand you right the only Change is the interface. It changes from a native interface to the standard AXI bus. If this i right you have to change only the run_phase of all transactors (driver, monitor). The seq_item should be the same, because this is Independent from the pin-level interface you are using. In this case you Can reuse all your esquences/tests etc.

In the order of re-use, I prefer the following order:

  1. re-use the block env by just re-configuring it - no code modifications but additional code in the form of configuration settings
  2. re-use the block env with re-configuring it + add some translators/adapters. We don’t modify any existing code but add additional code for translators/adapters
  3. re-use by modifying the existing code. In this case, we are going to touch the existing code

In my view, 3rd option is the least preferred (this is the one you are impying to use).
Apart from this, in my case, I cant afford to touch AXI agent as it is a VIP from a third party.

I am thinking something on the lines of adding some translaction code that convers legacy sequences/sequence_items to new sequences/sequence_items but I don’t have much experience in this area. I am trying to tread carefully here.

I would appreciate thoughts from your and experts who have faced this issue before.

4

In reply to verif_learner:

To update on this topic, the following article by Doulos deals what I am talking about. I need to figure out some implementation details:

https://www.doulos.com/knowhow/sysverilog/uvm/easier_uvm_guidelines/layering/