Verification of ASYNCHRONOUS FIFO

Hi ALL,
I am just starting to implement this of my own and in a very initial stage of testbench development.

i have few questions regarding the thread discussion, appreciate if someone can help me understand the pros/cons of each method of implementation.
for synchronous FIFO:
my FIFO ports are :
input clk, reset, rd, wr, data_in
output data_out, empty, full
here in this case i can drive rd and wr simultaneously as i am reading out on data_out and writing on data_in.

what would be the ideal case of implementation.
i feel having one agent with different sequences for different use cases should work just fine and doesnt need multiple agents.
i can use fork join in order to force both the operation at one time.
Does that makes sense ?

also are there any different methods of implementation that i can try?
Appreciate your help and guidance here.
Thanks