I am trying to run a simple uvm testbench and i can get it to compile and “run”, but it seems to stop immediately into the simulation at the first rising edge of the clock…
I put some silly print statements into the various tasks/function and it looks like the sequence body() task is running, the run_phase() of the test is running, but the run_phase() task of the driver is not running.
I reviewed the connect_phase code in my agent and as far as I can tell the sequencer and driver are connected correctly.
So what I am trying to understand is why does my driver code never execute?
Or at least it seems to never execute because my print statement in there never executes…
It is also confusing to me since it was my understanding was that the driver pulls sequence_items from the sequence via the sequencer and the sequence body task generates the sequence_items. If this is correct then i dont understand why my sequence body task executes but my run_phase() task in my driver never runs… since in my understanding the drive run_phase() task should “call” or at least initiate the sequence_items body task.
Any ideas what i am doing wrong?
Below is the output from my console with the print statement i am using.
UVM_INFO @ 0: uvm_test_top.m_env.uvm_csv_agent.drv [uvm_test_top.m_env.uvm_csv_agent.drv] get_full_name()
uvm_test_0.run_phase : phase.raise_objection:
uvm_csv_packet_sequence.body :
uvm_test_top.m_env.uvm_csv_agent.sqr.m_seq.uvm_csv_packet_item_inst
data = 'hc 'd12
valid = 'h1 'd1
** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
Time: 10 ns Iteration: 1 Instance: /top_tb/depack/depacketizer_buffer_inst/data_shifter_inst
** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
Time: 10 ns Iteration: 1 Instance: /top_tb/depack/depacketizer_buffer_inst/data_shifter_inst
UVM_INFO verilog_src/uvm-1.1d/src/base/uvm_objection.svh(1268) @ 10000: reporter [TEST_DONE] ‘run’ phase is ready to proceed to the ‘extract’ phase
Below is the code for the “relavent” parts of my testbench.
If there are other parts of code in here that i should add to clarify things let me know.
test.sv
task uvm_test_0::run_phase (uvm_phase phase);
phase.raise_objection(this);
$display("uvm_test_0.run_phase : phase.raise_objection: ");
m_seq.start(m_env.uvm_csv_agent_inst.uvm_csv_sequencer_inst);
phase.drop_objection(this);
endtask : run_phase
sequence.sv
task uvm_csv_packet_sequence ::body();
uvm_csv_packet_item_inst = uvm_csv_packet_item::type_id::create("uvm_csv_packet_item_inst");
$display("uvm_csv_packet_sequence.body : ");
start_item(uvm_csv_packet_item_inst);
finish_item(uvm_csv_packet_item_inst);
endtask : body
agent.sv
function void uvm_csv_agent::build_phase(uvm_phase phase);
uvm_csv_sequencer_inst =uvm_csv_sequencer::type_id::create("sqr",this);
uvm_csv_driver_inst =uvm_csv_driver::type_id::create("drv",this);
endfunction : build_phase
function void uvm_csv_agent::connect_phase(uvm_phase phase);
uvm_csv_driver_inst.seq_item_port.connect(uvm_csv_sequencer_inst.seq_item_export);
endfunction : connect_phase
driver.sv
task uvm_csv_driver::run_phase(uvm_phase phase);
forever
begin
$display("uvm_csv_driver::run_phase ");
seq_item_port.get_next_item(req);
do_drive();
seq_item_port.item_done();
end
endtask : run_phase
task uvm_csv_driver::do_drive();
@(posedge virtual_interface.clk);
virtual_interface.data = req.data;
virtual_interface.data_valid = req.valid;
endtask : do_drive