UVM_RAL: Why Predictor calling bus2reg function(Adapter) 2 times automatically?

In reply to raja.kuraku:

What is the access policy of that register? If it is WO reading back is OK.
If status is not OK, you are reading twice. See the code below:

read_reg(model.CAP_LOW,status,read_data);
if(status == UVM_NOT_OK)
  `uvm_error("REG_SEQUENCE","Status Is NOT OK During Read Operation")
rd_data = model.CAP_LOW.get_mirrored_value();