UVM RAL for configuration of TB in a SoC environment

UVM
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1

Hello all

I was assuming RAL can be only used for Register verification like read/write or bitbash verification of registers .

Is there a way to use the RAL for configuring the TB to activate sub modules of an SoC in configuration phase of the test /env and run normal functionality traffic in run phase ? Basically any other use RAL can be used instead of REG verification . I’m really not sure part from reg verification

2

In reply to Sv-hustler:

Suppose we want to run a test case but before the run phase executes we need to configure some registers using RAL. Like setting reset register or power etc. Can anyone explain if this kind of test case execution is possible?

3

In reply to Sv-hustler:

Only in the run_phase you can execute things like you are describing. All other phases prior to the run_phase are intended to construct, connect check and configure your UVM environment. What you want to do you should do prior to any other functionality.

4

In reply to Sv-hustler:

In reply to Sv-hustler:
Suppose we want to run a test case but before the run phase executes we need to configure some registers using RAL. Like setting reset register or power etc. Can anyone explain if this kind of test case execution is possible?

You can configure these registers before the main sub-phase in the run_phase, e.g. in [pre_/post_]configure sub-phase.