using file operation in verilog can we read the input from txt file or not, if yes then how?
i am trying with mux 4x1 but not getting output file and not even read the input txt file…
module mux41_filerw_tb();
reg [1:0]sel;
reg [3:0]a;
wire y ;
reg [0:7]mem[0:7];
integer i,j;
task initialize;
begin
a=0;
sel=0;
end
endtask
task select(input [1:0]a);
begin
sel=a;
end
endtask
initial
begin
$readmemb("mux.txt");
outfile=$fopen("write.txt");
initialize;
#10;
for(i=0;i<4;i=i+1)
begin
select(i);
for(j=0;j<16;j=j+1)
begin
inps(j);
#10;
$fdisplay(outfile,"a[3:0]=%b--select=%b--y=%d\n", a, sel, y);
end
end
$fclose(outfile);
#100;
$stop;
end
endmodule