Usage of bind statement with VHDL DUT

In reply to Chandrashekhar Goudar:

To me it looks like you are using VCS-MX from Synopsys in this case. If yes, use the flag -sva_bind_enable to get this going (for SVA binding to VHDL). Since this is Mentor forum, I will post a detailed example on a neutral forum/site @ http://www.veriflabs.com shortly. Meanwhile if you need urgent help on this specific option/usage, drop me an email via srini <> cvcblr

Regards
Srini
http://www.verifworks.com