SystemVerilog provides a method of implementing a “hash map” or “dictionary” in the form of an associative array. I’ve been trying to find out if SystemVerilog has a similar construct for “unordered lists”/“hash sets,” but I can’t find any details. Does such a construct exist?
Hi,
SV has queues but no unordered lists. you can create associative array of queues. Forum moderators can provide more details
In reply to Arthur Wesley:
SystemVerilog does not have an unordered list construct, but you can get the the same behaviors by using the keys of an associative array and ignoring the element values (or making the key values match the element values.
It would help to know exactly what you are trying to model that you thing requires an unordered list. In many cases a queue or dynamic array works just as well.
In reply to dave_59:
I wanted to store a group of cache addresses in a set, that is all. An associative array that contains no data is a sufficient solution. Thank you for your answer :)