In reply to Have_A_Doubt:
Thanks again for checking my papers and assertions.
I am still human (can make mistakes :)
I fixed the dynamic delays with the following and that works
I updated te package
https://verificationacademy.com/forums/systemverilog/sva-package-dynamic-and-range-delays-and-repeats
sequence dynamic_delay(count);
int v;
(count<=0) or ((1, v=count) ##0 (v>0, v=v-1) [*0:$] ##1 v<=0);
endsequence // dynamic_delay
sequence dynamic_delay_lohi_sq(d1, d2, sq);
int v1, vdiff;
dynamic_delay(d1) ##0
((1, vdiff=d2-d1) ##0 (vdiff>0, vdiff=vdiff - 1)[*1:$] ##0 sq) or
(d2-d1==0 ##0 sq); // was (vdiff>=0,
endsequence
sequence dynamic_delay_fm_lohi_sq (d1, d2, sq);
int v1, vdiff;
dynamic_delay(d1) ##0
(first_match((1, vdiff=d2-d1) ##0 (vdiff>0, vdiff=vdiff - 1)[*1:$] ##0 sq)) or
(d2-d1==0 ##0 sq); // was (vdiff>=0,
endsequence