Unexpected results for Dynamic delay range

SystemVerilog
,
10

In reply to Have_A_Doubt:
Thanks for pointing it the error. How about this instead?


sequence dynamic_delay_lohi_sq(d1, d2, sq);
        int v1, vdiff;
    dynamic_delay(d1)##0 
    (sq or     
    (1, vdiff=d2-d1) ##0 (vdiff>0, vdiff=vdiff - 1)[*1:$] ##1 sq); 
  endsequence

for d1==0, d2=2
you delay for d1 cycles, then you evaluate
(sq or
if diff>0 (2 in this case) you get ##1 sq (vdiff==1), then ##1 sq (vdiff==0)
you end up with
##d1 (sq or ##1 sq ##1 sq