In reply to Have_A_Doubt:
sig[*4:10] intersect 1[*10]
This means that sig must occur 4 to 10 times IN exactly 10 cycles.
If you the sequence (sig sig sig sig !sig)
Here the 1[*1:10] has many threads, including the 1[*4] as an option.
I am not sure I understand your question. However, you need the 1[*1:10].
With 1[*10] the sequence on the left hand side of the intersect MUSt match 10 cycles.
(2) - EDA Playground // code
EPWave Waveform Viewer // wave
sig[*4:10] intersect 1[*10]
You are asking that sig[*4] (in 4 cycles coincides 10 cycles; obviously false.
That consequent is only true with sig==1 in 10 consecutive cycles.
module m;
bit clk , sig ;
int pass, fail;
initial forever #1 clk = !clk ;
property intersct ;
@(posedge clk) $rose(sig) |-> sig[*4:10] intersect 1[*10]; // Working of consequent ??
endproperty
assert property( intersct ) pass=pass+1; else fail=fail+1;
initial begin
$dumpfile("dump.vcd"); $dumpvars;
@(posedge clk) sig <= 1 ;
repeat(3) @(posedge clk) sig<=1;
@(posedge clk) sig<=0;
#50 ; $finish();
end
endmodule