SystemVerilog typedef enum

SystemVerilog
, , ,
1 
class config #(parameter FREQ = 48);
 
typedef enum {WLEN8=8,WLEN16=16,WLEN18=18,WLEN20=20,WLEN24=24} WORD_LENGTH_e;
typedef enum {RATION8=8,RATION16=16,RATION32=32,RATION48=48,RATION64=64} LR_RATION_e;

  LR_RATION_e config_ration = RATION16;
  WORD_LENGTH_e word_len=WLEN16;

endclass

class test;
config cfg;
------
function new();
  cfg = new;
endfunction
------
function add();
  cfg.word_len = WLEN32;
endfunction
endclass

i try to used typedef enum in another class by I can able to do that can anyone help me out?

2

In reply to Kashyap_14:

There are a number of problems with your code

  • config is a keyword. Use Config or some other name.
  • You never defined a WLEN32 enum name.
  • You should put typedefs outside a class if you expect to use them in multiple classes. But you can access them from another class by using the class scope :: operator.
cfg.word_len = Config#()::WLEN24;