SystemVerilog Constraint Help for Negative/Postiive numbers

In reply to ABD_91:

Assume the following

LIMIT - 3H
A - 020B (Hex), B - FD9C (Hex) and C - 0A44 (Hex)

Sum -09EB (Hex) > LIMIT (3 Hex)

I am seeing the values as all “Hex” so if I do see a MSB of ‘1’ i know the number is negative.