System verilog fifo

In reply to dave_59:

hi dave,

I am expecting,

///////this is my stimulus/////////
rst=0
write =1;

for(int i=0;i<5;i++)
begin
data_in=i+1;
end

read=1

////////expecting this out put////
data_in=1,data_out=1
data_in=2,data_out=2
data_in=3,data_out=3
data_in=4,data_out=4

PS:I am trying to upload the waveform but i am not able to do so,Sorry for the inconvinience.

Thanks & Regards,
Veeresh