System verilog constraint for addr to not cross 4kB boundary

SystemVerilog
1

I have the AXI4 requirement of burst length to NOT cross 4kB boundary.

Given the Start address and burst length, could you suggest on how to write a constraint to take care of this?

Thank you.

2

In reply to UVM_learner6:

start_address[31:12] =={start_address+burst_length}[31:12]

Use your AXI bus width instead of 31

3

In reply to dave_59:

Hi Dave, Thank you, could you please explain this in words?

My burst length is 'd25.

constraint addr_c2 { addr[32:12] == {addr+'d25}[32:12]; }

I also get this error :
Error-[CSTR-USFC] Unsupported system function call
, unknown line number
“$$commaassign(_vcs_func, (this.addr + 'd25), _vcs_func, 1)”
System function ‘$$commaassign’ is not yet supported in constraints.

4

In reply to UVM_learner6:

Address bits [31:12] represent the 4kb block number. The constraint checks that the start address and the end address are both in the same block.

“not yet supported” is a tool issue and this Mentor sponsored public forum is not for discussing tool specific issues. Please contact your tool vendor.