In reply to SparkyNZ:
There’s lots of papers and tutorials regarding non-blocking vs blocking operators and when to use them, so I won’t repeat that here. The canonical paper, IMHO, is Cliff Cummings:
Nonblocking Assignments in Verilog Synthesis, Coding Styles That Kill!
But to quickly answer a misconception: What is sequential logic? It’s any memory element (i.e. a Flip-Flop, or a memory) that’s triggered by a clock. (Let’s ignore latches or other more esoteric kinds of memory out of the discussion).
If you’re not describing “sequential” logic, you’re describing “combinational” logic. Most (normal) logic can be broken down into one of these two types.
Edit to add: You can safely ignore the CDC stuff for now, since you’re operating on just one clock.
Regards,
Mark