SVA Sequence Subtleties (Sequence fusion / Sequence concatenation)

SystemVerilog
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4

In reply to ben@SystemVerilog.us:

Thanks very much Ben.
Yes, I absolutely agree.
I should KISS as much as I can. ;)

But I can’t really seem to get around using that sequence.
Your guess is close but not quite there.
However, I think I can now explain better

I essentially need a dynamic repeat expression, i.e. I need to see transaction_advance go high (or stay high) num_ahead times before I continue.

So the entire property could be written as something like this:


property p_transaction;
  int num_ahead;
  (request_advance, num_ahead=data)
  ##1 transaction_advance [=num_ahead]
  |-> ##[1:$] response_advance
endproperty

Unfortunately the [=num_ahead] notation does not allow dynamic numbers of repetition.
So I’ve tried your sequence sq_rpt_simple_count from your SVA package SVA: Package for dynamic and range delays and repeats | Verification Academy.
Buy it seems that doesn’t support 0-repetitions.

With that do you have any suggestions?