SOC Verification - Write C test where 32 bit processor will write the 64 bit memory (each location=64 bit/ Depth=65 )

SystemVerilog
, ,
1

ARM processor(32 bit) can write-32 bits of data each time. There is memory in the chip - 64 bit each location (Initial data = 64’b 0000000101) and memory depth=65 , each time you need to write shifted data (64’b110<<1) to each memory location . how can we write using c test ?

I have written below sample C-code . Can somebody confirm whether below answer is correct ??

int main(void) {

unsigned int *addr ;
unsigned int flag = 0; 
addr = 0xFFAA_00F0 ;
*addr = 0x0; // Making initial value = 32'h0;
for (int i =0 ; i < 62 ;i++) {
  if (i<=31) {
  *addr = (0x6 << i) ;  
  addr++ ; // will point to next DWORD aligned address . 4 byte increment
  addr++ ; // will point to next DWORD aligned address . 4 byte increment . Total 8 byte increment each time .  
  if (i == 31 ) flag =1 ;
  }
  else {
  if (flag) {
 addr++ ; // extra 4 byte increment to point data location 63:32 
  flag= 0; 
};
*addr = (0x6 << i) ;  
 addr++ ; 
 addr++ ; 
 }
}
return 0 ;
}
2

Problem statement is well described with below table of mem data . we have to write shifted 0x6 data to 64 bit memory locations . consider that ARM proc which has 32 bit data/address port , and there is interconnect which translate the 32 bit write req to 64 bit req to memory .

0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0110  //0th mem location
0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_1100
0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0001_1000
0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0011_0000
0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0110_0000
0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_1100_0000
...
...
0000_0000_0000_0000_0000_0000_0000_0000_1100_0000_0000_0000_0000_0000_0000_0000  //29 mem location-lower word access w.r.t 32 bit Proc .
0000_0000_0000_0000_0000_0000_0000_0001_1000_0000_0000_0000_0000_0000_0000_0000  //30 mem location-upper word access w.r.t 32 bit Proc . 
0000_0000_0000_0000_0000_0000_0000_0011_0000_0000_0000_0000_0000_0000_0000_0000  //31 mem location-upper word access w.r.t 32 bit Proc .
..
..
0001_1000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000
0011_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000
0110_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000  // 60th mem location location
3

Please find updated c driver code for above problem statement .

int main(void) {

unsigned int *addr ;
unsigned int flag = 0; 
addr = 0xFFAA_00F0 ;  // lets say its initial address 
*addr = 0x0; // Making initial value = 32'h0;
for (int i =0 ; i < 61 ;i++) {

  if (i<=30) {
    *addr = (0x6 << i) ;  // writting to lower dword memory .
     addr++ ; // will point to next DWORD aligned address . 4 byte increment
     addr++ ; // will point to next DWORD aligned address . 4 byte increment . Total 8 byte increment each time .  
   if (i == 30 ) {
     addr++ ; // extra 4 byte increment to point data location 63:32 from this point onward .
     *addr = 0x1 ;  // Making 30th location upper word as 0x1 as per problem statement  
    }
  }

  else {
     addr++ ; // will point to next DWORD aligned address . 4 byte incremen
     addr++ ; // will point to next DWORD aligned address . 4 byte increment . Total 8 byte increment each time . 
     if (i == 31 ) {
     *addr = 0x3 ;  // Making 31th location upper word as 0x3 as per problem statement  
     }
     else {   // writting shifted 0x6 to location > 31
    *addr = (0x6 << (i-32)) ;  
    }
  }
}

return 0 ;
}