Parity

SystemVerilog
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1

Can anyone pls help me to write a function to calculate the parity and generate 1 for even or 0 for odd parity under class in System verilog

2

This is one of the basic logical operators in Verilog; there is no need to create a function. I suggest you spend some time to study the SystemVerilog LRM more carefully.

Dave

3

In reply to dave_59:

Sure,Thanks.