Multiple Reset for RAL

UVM
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1

When we have multiple reset to be taken care for RAL, how do we do it for the following situation:
Lets say register A which has 5 register fields A.A1, A.A2, A.A3, A.A4, A.A5.
We have 2 resets rst1 and rst2.
A.A1 and A.A2 are reset by rst1.
A.A3, A.A4 and A.A5 are reset by rst2.

Any solutions wrt this scenerio?

2

In reply to Deepak M:

I’m not sure if this is a practical scenario. How do you handle the reset of single register fields in the DUT? I believe this is impossible.
But the RAL provides 2 different reset options. The intention is to oerform the reset from 2 different sources (HARD, SOFT).

3

In reply to Deepak M:

Let’s assume we have a register block called reg_block and it contains 2 registers A and B.

  • Register A has fields A1, A2, A3, A4, and A5.
  • Register B has fields B1 and B2.
  • A.A1 and A.A2 are reset by rst1 as well register B.
  • A.A3, A.A4 and A.A5 are reset by rst2.

Typically you reset your register model either in a reset phase of a test, where you start your reset sequence or it might be you have a running process for detecting reset and then you reset your register model.
If the whole register block and its registers have the same reset signal, that’s clear once the reset signal has been detected we just call reg_block.reset(), and that call by default calls reset() of each register and each register field.
In your case, we need to single out register A and its fields as it’s a special case.
So for example assuming we have 2 running processes for detecting rst1 and rst2, it would look like the following.

 class test extends uvm_test;

    // .. constructor 
    // .. build_phase

    virtual task main_phase(uvm_phase phase)
        phase.raise_objection(this);
        fork
            detect_rst1();
            detect_rst2(); 
        join
        phase.drop_objection(this);
    endtask

    virtual task detect_rst1();
        uvm_reg         regs[$];
        uvm_reg_field   fields[$];
        uvm_status_e    status;
        wait(rst1);
        reg_block.get_registers(regs);
        foreach (regs[i]) begin
            if (regs[i].get_name() == "A") begin
                regs[i].get_fields(fields);
                foreach(fields[i]) begin
                    if(fields[i].get_name() inside {"A1", "A2"}) fields[i].reset();
                end
            end else begin
                regs[i].reset();
            end
        end
    endtask

    virtual task detect_rst2();
        uvm_reg         regs[$];
        uvm_reg         register[$];
        uvm_reg_field   fields[$];
        uvm_status_e    status;
        wait(rst2);
        reg_block.get_registers(regs);
        register = regs.find with(item.get_full_name() == "A"); 
        register[0].get_fields(fields);
        foreach(fields[i]) begin
            if(fields[i].get_name() inside {"A3", "A4", "A5"}) fields[i].reset();
        end
    endtask

endclass

Note: this code is just a pseudocode to explain the idea and is based on my understanding of the problem. If you want an exact code, you could share your testbench environment setup.