Hello all,
It is becoming more and more common to write assertions using multiple clocks, I have a question regarding the same.
@(posedge clk1) sig_1 |-> @(posedge clk2) sig_2
@(posedge clk1) sig_1 |=> @(posedge clk2) sig_2
In these scenarios, the implication operator will consider posedge clk1 or clk2?
At which posedge of 2nd clock, sig_2 will be evaluated?
Will there be a 1 cycle delay in the second assertion execution?
Thank you.