Monitor block in system verilog testbench

SystemVerilog
1

I created APB monitor class in system verilog testbench.But it is not working properly.plz give me idea.

 task monitor_read();                  //read monitor task for read operation
         @(mon_if.mon_cb);
	   wait(mon_if.mon_cb.wr_rd==0);
	   wait(mon_if.mon_cb.sel==1);
	   wait(mon_if.mon_cb.enable==0);  
	 repeat(1)@(mon_if.mon_cb.enable==1);
			     begin
			           data2rm.wr_rd = mon_if.mon_cb.wr_rd;
                                   data2rm.sel = mon_if.mon_cb.sel;
                                   data2rm.enable = mon_if.mon_cb.enable;
                                   data2rm.addr = mon_if.mon_cb.addr;
                                   data2rm.data_out = mon_if.mon_cb.data_out;
	                           
				  
                            end
		           
         endtask: monitor_read

virtual task start_read();
  fork
   forever
         begin
              $display("%0t=========start of monitor method================",$time);
              monitor_read();
              new_data= new data2rm;
              mon2rm.put(new_data);                //put transaction in to monitor to ref. model mailbox
              mon2sb.put(new_data);                //put transaction in to monitor to scoreboard mailbox
              $display("%0t============end of monitor method===============",$time);
         end
  join_none
 endtask:start_read
2

In reply to p_patel:

It would really help if you used code tags and explained what you expected your code to do versus what you observed it doing. It would save a lot of time for the people trying to help you.

A couple of quick observations about your code:

You have
repeat(1) which doesn’t do anything. Why did you put it there?

A lot of people get into trouble mixing clocking events with other event controls. I suggest that once you have a process with
@(cb), use that as your only event control. So you may want to re-write your code as

task monitor_read();                  //read monitor task for read operation
         @(mon_if.mon_cb iff 
	  (mon_if.mon_cb.wr_rd==0 &&
	   mon_if.mon_cb.sel==1 &&
	   mon_if.mon_cb.enable==0) );  
	 @(mon_if.mon_cb iff mon_if.mon_cb.enable==1);
...
3

My driver class for APB read operation is following:
virtual task start_read(); //read task for read operation
begin
$display(“%0t================start of read method===================”,$time);
gen2drv.get(data2put);
@(drv_if.drv_cb); //whenever clocking event happen
drv_if.drv_cb.addr<=data2put.addr; //passing pin level information to inteface
drv_if.drv_cb.wr_rd<=data2put.wr_rd;
drv_if.drv_cb.sel<=data2put.sel;
drv_if.drv_cb.enable<=data2put.enable;

      repeat(1) @(drv_if.drv_cb);                   //after 1 cycle delay assign enable signal to interface according to protocol
      drv_if.drv_cb.enable <=1'b1;
  
      repeat(1) @(drv_if.drv_cb);                   //after 1 cycle delay make enable signal low-according to protocol  
      drv_if.drv_cb.enable<=1'b0;
      drv_if.drv_cb.sel<=1'b0;
      
      drv2gen.put(data2put);
      
      $display("%0t wr_rd in driver for read=%0d",$time,data2put.wr_rd);
      $display("%0t addr in driver for read=%0d",$time,data2put.addr);
      $display("%0t sel in driver for read=%0d",$time,data2put.sel);
      $display("%0t enable in driver for read=%0d",$time,data2put.enable); 

      $display("%0t===================end of read method====================",$time);
end

endtask:start_read

But whatever you gave code following is not working for APB monitor:
task monitor_read(); //read monitor task for read operation
@(mon_if.mon_cb iff
(mon_if.mon_cb.wr_rd==0 &&
mon_if.mon_cb.sel==1 &&
mon_if.mon_cb.enable==0) );
@(mon_if.mon_cb iff mon_if.mon_cb.enable==1);

4

Can anyone guide me for the above issue?