Magic square on system verilog

SystemVerilog
11

In reply to sam33rs:

class matrixsum;

rand bit [7:0] a [0:2][0:2];

int i,j,k;

constraint c1 {
foreach(a[i,j]) {
a.sum with (item.index(1) == i ? int’(item): 0) == 15; // rows
a.sum with (item.index(2) == j ? int’(item): 0) == 15; // cols
}
a.sum with (item.index(1) == item.index(2) ? int’(item) : 0) ==15; // diag1
a.sum with ((item.index(1) + item.index(2)==2) ? int’(item) : 0) ==15; // diag2
}

function void display ();
$display (“The value of array is %p” , a);
endfunction

endclass
module test;
matrixsum m1;

initial begin
repeat(3) begin
m1=new();
m1.randomize();
m1.display();
end
end

endmodule

Here in bold syntax. what’s the requirement? and how it will work? I want to know the logic behind that 4 syntaxes. but why another value other than 12 and 15 is not applicable to get the sum as that replaced value of 15 in this code.

here, whats use of item.index(1) == item.index(2) and (item.index(1) + item.index(2)==2 and

    a.sum with (***item.index(1) == i ? int'(item): 0***) == 15; // rows
    a.sum with (***item.index(2) == j ? int'(item): 0***) == 15; // cols

 a.sum with ( ***item.index(1) == item.index(2) ? int'(item) : 0***) ==15; // diag1
 a.sum with ( ***(item.index(1) + item.index(2)==2) ? int'(item) : 0***) ==15; // diag2

here, why only index(1) & index(2) is taken why not others else ? give me satisfactory answers of my questions.