Low power verification

SystemVerilog
1

Hai ,
To do low power verification
How can we?
to go through that from where we have to start, and what are the basics?

2

In reply to nandi:

Start here: Power Aware Verification | Simulation-Based Techniques | Verification Academy

3

In reply to dave_59:

thank you dave.

4

In reply to nandi:

I have codes uploaded on some UPF concepts here: GitHub - mayurkubavat/UPF: Constructs for Unified Low Power Format (UPF) with Verilog/SystemVeriog designs

5

In reply to MayurKubavat:

thank you mayurkuavat.