Invalid type for net: Error

SystemVerilog
,
1

Hello!

Example code:

module dut ();

    input ...
    output ...

    real voltage;

endmodule

module test()

       wire real dut_volt = dut.voltage;

endmodule

I am unable to create the net of the type “real” which I guess is the only Floating point representation data type available in SV.

Error also reads - Net data types can only be composed of 4-state integral types, enum with 4-state base type, structure, union, and fixed-size arrays.

I understand that real is a 2-bit data type, but I don’t know how to fix the issue ?

Help is much appreciated!

Thanks in adavance!

2

In reply to Bhaskar44:

With what you have shown, you don’t need a wire. You can use a continuous assignment to a variable of any type, as long as there is only one continuous assignment driving the variable.

module test()
       real dut_volt;
       assign dut_volt = dut.voltage;
endmodule

If you need multiple drivers to the same signal, then you have to use a wire and a wire with anything beyond an integral data type needs a special declaration. See 6.7.2 Net declarations with user-defined nettypes in the 1800-2012 LRM for more information.

BTW, please use code tags when posting your code.

3

In reply to dave_59:

Dear Dave

Thanks for the response and the solution.

I did refer the section that you have mentioned, but I was unable to understand how to use a user-defined datatype. It would be really helpful if you could provide me a link to an example.

I believe that I need to do that to address my issue completely.

And also,
“If you need multiple drivers to the same signal, then you have to use a wire” - Do you mean to say if dut.voltage is used by more signals other than just dut_volt ?

If yes, I will need to understand how to do the special declaration!

Regards
Bhaskar

4

In reply to Bhaskar44:
When I say multiple drivers, I mean multiple concurrent continuous assignments to the same signal(dut_volt). Then dut_volt would have to be declared as a wire with a nettype.

For performance reasons, many tools have predefined packages that you can import that have resolution functions to take the min, max, or sum of all the real drivers on a signal. You will have to look it up the user manual of the tool you are using.