`include vs import

UVM
, ,
1

Could someone please tell me precisely the difference between import and include. when do we need to use import statement and when include. And moreover , i am confused that this import and include statements are meant for inclusion of packages only or other files as well?
Please respond…i’m not getting its exact answer…
Thanks in advance!!!

2

I have a blog post on this very topic:

SystemVerilog Coding Guidelines: Package import versus `include

3

Dave’s blog could have answered this for you.

To explain in simple terms,
1)we use import for importing a package. Using import you can select components of a package like a class or a task or “*” to import complete package.
2)we use include to physically place the code of a file while compiling. With include, you just get entire code here but cannot have part of the include file.

Thanks,
Sireesh K

4

In reply to dave_59:

Thanks Dave!!
It is really very helpful.

5

In reply to skumar:

Thank you!!