How to use generate block in top module in UVM

UVM
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Hi chrisspear,

Thanks for the help now my code is running with out any errors but now I am not able to see the mpu_clock1,mpu_clock2,mpu_clock3 similar like clk signal, I am observing only zero value ifor the above 3 signals can you please help how I can get all the mpu_clock signals similar like my clk signal.

Thanks in Advance,
Harshavardhan