In reply to chr_sue:
May i know the use of “uvm_reg_data_logic_t”? How it will resolve my problem? I will get “x” instead of 0 but how can i get the updated mirrored value?
I observed one more thing that if i use predict(rddata) after read() it will get the value because read() returns the output of type uvm_reg_data_t. But i observed that at the same time o read operation the comparison of DUT and mirrored value happened.
May i know in which cases the DUT and mirrored value is compared.
I am not using compare() method and also auto_predict is disabled. But any idea which enables this comparison at the same time when read happens?