How to stop or kill the running sequences

UVM
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14

In reply to srikanth_m:

Hi,
Instead of registering default sequence via uvm_object_wrapper use sequence object. Refer below code.


uvm_config_db#(uvm_sequence_base)::set(this,"top_tb0.vir_sqr.run_phase","default_sequence", seq_1_h);
uvm_config_db#(uvm_sequence_base)::set(this,"top_tb0.vir_sqr.sqr2.main_phase","default_sequence", seq_2_h);

Now in testcase’s run phase you can monitor state of seq2 and kill seq1.


task run_phase (uvm_phase phase);
  seq_2_h.wait_for_sequence_state(UVM_FINISHED); // wait for seq2 to be finished
  seq_1_h.kill(); // kill sequence 1
endtask : run_phase

Make sure that seq1 is not raising any objection before kill, otherwise simulation won’t be completed due to raise and drop objection count miss match.

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