Hi Forum,
My register block comprises of different flavors of CTRL , WR , RD and STS registers
REGA :: REGA_WR , REGA_CTRL , REGA_RD and REGA_STS
REGB :: REGB_WR , REGB_CTRL , REGB_RD and REGB_STS
… … … … …
REGx :: REGx_WR , REGx_CTRL , REGx_RD and REGx_STS
The CTRL registers are always located at a lower address compared to respective STS register
Due to which bit_bash sequence first writes into CTRL reg and then performs write-reads to STS reg.
The functionality of the registers are as follows ::
CTRL reg comprises of 2 fields : Index and OP ( to indicate Write or Read operation )
(1) For Write operation
Init sequence first writes the respective data to *WR register.
Via field Index the address of the location where the value in *WR needs to be written in SRAM is written. It also writes into OP field to indicate Write operation
Init sequence then polls for *STS register to know that the write was successful
(2) For Read operation
Init sequence first writes the address of the location to be read in field Index of respective *CTRL register. It also writes into OP field to indicate Read operation
Init sequence then polls for *STS register to know that the read was successful
Then the *RD register is read which contains the data read from SRAM
Currently in bit_bash since the sequence writes into *CTRL register first, internally a Write or Read operation is initiated. Due to which the value of *STS register is not at default 0 ( as the write or read operation is successful )
For now we have skipped all the *STS registers from bit_bash using ::
uvm_resource_db#(bit)::set({"REG::", Reg_block.REGA_STS.get_full_name()},"NO_REG_TESTS", 1);
Due to this *STS registers are never written into nor are they read back.
I was thinking on having 2 bit_bash sequences ( bit_bash_sts_seq , bit_bash_nonsts_seq )
Where the ‘bit_bash_sts_seq’ would only test the *STS registers and skip the *WR , *RD and *CTRL registers
The ‘bit_bash_sts_nonsts_seq’ would only test the *WR , *RD and *CTRL registers and skip the *STS registers
The challenge is the skipping of *STS registers should only happen for ‘bit_bash_sts_nonsts_seq’ and not the ‘bit_bash_sts_sts_seq’
If I were to simply use ::
uvm_resource_db#(bit)::set({"REG::", Reg_block.REGA_STS.get_full_name()},"NO_REG_TESTS", 1);
I believe this would skip the *STS registers from both sequences.
Any suggestions are welcome
Thanks in Advance