How to print full VMM environment structure

skuppam83 · August 9, 2021, 6:10am

Hi,

Please provide the construct to use to print the full ENV structure of an ENV in VMM methodology.

Similar to UVM Topology,

Thanks,
siva

dave_59 · August 9, 2021, 4:51pm

In reply to skuppam83:

VMM does not have the concept of testbench structure embedded in its base class libraries. There is no way to traverse the testbench architecture from within SystemVerilog.

skuppam83 · August 9, 2021, 5:17pm

In reply to dave_59:

Okay, Thanks Dave.