In reply to atanu.biswas:
You are correct in that continuous assignments are legal in a checker, my error since I did not revise that point from my 3rd Edition where it was illegal in the previous version of 1800. Thanks for pointing that out.
// 1800'2017 17.2 Checker declaration
checker checker_identifier [ ( [ checker_port_list ] ) ] ;
{ { attribute_instance } checker_or_generate_item }
endchecker [ : checker_identifier ]
checker_or_generate_item ::=
checker_or_generate_item_declaration
| initial_construct
| always_construct
| final_construct
| assertion_item
| continuous_assign // <---------
| checker_generate_item
Ben SystemVerilog.us