How to override or disable uvm_status_e i.e. UVM_HAS_X for specific register or specific task

In reply to saikittu72:

I belive you are searchin in the wrong place. Physically there is no ‘X’, there is only ‘1’ or ‘0’. If your configuration registers have an undefined value this might cause serious trouble.
You should take care to reset all your registers at the beginning of your simulation.