How to create, config, and use Agentic IA in a UVM-based Testbench?

UVM
, ,
1

I’m exploring how to integrate Agentic AI into a SystemVerilog/UVM verification environment. The goal is for the agent to assist with tasks such as:

  • Generate the Verification Plan and Test Plan from the spec and a VPlan format.

  • Generate the Testbench, compilation, and Simulation scripts

  • Run simulations, regressions, pass/fail and coverage reports, Debug, JIRAs, gaps