Hello everyone,
I am a newbie in uvm. I am trying to reach interface signals in uvm_test. In below you can see what did I do for that but I get the following error. Can anyone help me to solve this problem?
Thanks.
module testbench;
v_interface if0(clk, reset);
initial begin
uvm_config_dn#(virtual interface)::set(uvm_root::get(),"uvm_test_top_env.agt0", "vif", if0);
end
endmodule
class test extends uvm_test;
virtual v_interface if0;
virtual function void build_phase(uvm_phase phase);
uvm_config_db#(virtual interface)::get(this, "", "vif", if0);
endfunction
endclass
The ERROR I get: uninitialized virtual interface object.