Hello,
We have multi-port environment and between project number of ports keep varying, it could be 2,3,4…n ports. And at given time in simulation, port-0 can be in different FSM state and other port could be in different state. For example, port0.state is 1 and port1.state is 2. We have 5 different states and want to cover them across the ports using cross coverage. We have many more such variables, which needs to crossed.
I came across one of example of generating covergroup using array.
https://verificationacademy.com/forums/systemverilog/bitwise-toggle-coverage-bitvector
But, I am looking for something like this.
covergroup port_cvg (ports a) @(event)
FSM_CP : coverpoint a.fsm;
SPPED_CP : coverpoint a.speed;
endgroup : port_cvg
port_cvg ports_cvg[`NO_OF_PORTS];
Now, I am looking cross coverage between `NO_OF_PORTS, like
FSM_CROSS: ports_cvg[0].FSM_CP, port[1].FSM_CP, … port[n].FSM_CP
SPEED_CROSS: ports_cvg[0].SPEED_CP, ports_cvg[1].SPEED_CP … ports_cvg[n].SPEED_CP
FSM_SPD_CROSS : FSM_CROSS, SPEED_CROSS;
If there a way to use “for” loop or “foreach” loop to cover cross coverage between N-Ports?
Please Note: Modelsim does not support use of “object.variable” in cross coverage and I have ticket opened for it with them. As a workaround, I first need to define as coverpoint and then have cross coverage of coverpoints.
Regards
Nimesh