Kapil,
Your doubt is not clear, it would be better if you post example code. I recommended you learn about RAL first, just to give an overview you need to connect your bus sequencer and adapter to the top regblock in your env. your test sequences/env generates register read/write request using RAL and RAL uses reg adapter to convert the transactions into bus transactions format. Then RAL uses sequencer assigned during initialization to drive these transactions on to the bus. Basically adapter is only responsible for converting register transactions to env defined bus transactions.
For more info refer to UVM cookbook.
Rohit